The NI Semiconductor Test System (STS) series has been announced by National Instruments at NIweek in Austin (TX USA). These PXI-based automated test systems reduce test cost for RF and mixed-signal devices by opening access to NI- and industry-offered PXI modules in semiconductor production test environments. Compared to conventional semiconductor automated test equipment (ATE), STS lead users are experiencing reduced production costs and increased throughput and can now perform both characterisation and production with the same hardware and software tools. This decreases data correlation time and time to market.
“As integrated circuit complexity grows exponentially, cost-effective ATE that provides optimal test coverage in applications from design verification to end-of-line production test is increasingly important,” said Dr. Hans-Peter Kreuter, Senior Design and Application Engineer for Automotive Body Power Products at Infineon Technologies. “For mixed-signal test, the PXI-based STS outperforms what we typically see in traditional ATE with optimal test coverage at a very low cost.”
The open, modular architecture of STS gives engineers access to cutting-edge PXI instrumentation, unlike traditional ATE with its closed architecture. This is particularly important for RF and mixed-signal test, as the requirements of the latest semiconductor technologies often outpace the test coverage provided by traditional ATE. Powered by TestStand test management software and LabVIEW system design software, STS comes with a rich set of features for semiconductor production environments, including a customisable operator interface, handler/prober integration, device-centric programming with pin-channel mapping, standard test data format reporting and integrated multisite support. With these features, engineers can quickly develop, debug and deploy test programs, shortening overall time to market. Additionally with the fully enclosed “zero-footprint” test head, standard interfacing and docking mechanics, STS comes ready to integrate into a semiconductor production test cell.
“Traditional ATE systems require major costly retooling efforts on the test floor as generations of test systems become obsolete or unable to meet new test requirements, but the nature of the open PXI architecture of the STS helps us retain our original investment and build upon it, rather than throw it away,” said Glen Peer, Director of Test for Integrated Device Technology (IDT). “It provides the flexibility we need to reconfigure and grow our test platforms in parallel with our growing performance needs.”
The STS series includes three different models named T1, T2 and T4, which accommodate one, two and four PXI chassis, respectively. These varying sizes, along with common software, instrumentation and interconnect mechanics across all STS models give engineers the ability to optimise for a wide range of pin-count and site-count requirements. Additionally, the scalability of STS makes it practical to deploy from characterisation to production with the benefit of not only optimised cost, but greatly simplified data correlation to further shorten time to market.